The detection and tracking of object in large data surveillance requires a proper motion estimation and compensation techniques which are generally used to detect accurate movement from video stream. In this paper, a novel hardware level architecture involving motion detection, estimation, and compensation is proposed for real-time implementation. The motion vectors are obtained using 16×16 sub-blocks with a novel parallel D flip flop architecture in this work to arrive at an optimised architecture. The sum of absolute difference (SAD) is then calculated by optimized absolute difference and adder blocks designed using kogge-stone adder which helps in improving the speed of the architecture. The controller block is designed by finite state machine model used for synchronization of all the operations. Further, the comparator and compensation blocks are optimized by using basic logical elements and the Kogge-stone adder. Finally, the proposed architecture is implemented on Zynq Z7-10 field-programmable gate array (FPGA) and simulated using System Generator tool for real time traffic signal. The hardware and software parameters are compared with the existing techniques which shows that the proposed architecture is efficient than existing methods of design.