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image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Circuit Worldarrow_drop_down
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
Circuit World
Article . 2005 . Peer-reviewed
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Non‐planar interconnect

Authors: Williams, G. L.; Seed, N. L.; Purvis, A.; Maiden, A.; McWilliam, R.; Ivey, P. A.; Johnson, S.;
Abstract

PurposeThis paper describes a method for patterning fine line interconnections over non‐planar surfaces and introduces the idea of using holographic masks for more challenging geometries.Design/methodology/approachA photolithographic method for achieving grossly non‐planar interconnects is described. The patterning of electrical interconnections onto the piezo‐electric actuators of an ink‐jet print head is used as an example. Uniform coverage of the substrate is achieved using an electro‐depositable photoresist. The required pattern is transferred via a custom‐designed chrome‐on‐glass mask using a standard mask aligner.FindingsLarge arrays of 100 μm‐pitch electrical interconnections were successfully deposited onto 500 μm‐high high piezo‐electric actuators. It was necessary to modify the shapes of the line segments on the mask in order to compensate for diffractive line broadening. For more extreme 3D geometries it becomes necessary to consider the use of holographic masks.Originality/valuePrinted circuit boards and semiconductor wafers are nominally flat and traditional lithographic processes have been developed accordingly. However, future microelectronic packaging schemes and microsystems may require patterning to be achieved on grossly non‐planar surfaces. We have demonstrated that this can be achieved on ink‐jet print heads using photolithography and point to the research necessary to enable it to be realised on more extreme non‐planar substrates.

Country
United Kingdom
Related Organizations
Keywords

Ink jet printers, Circuits, Electrodeposition, Packaging, 600

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
2
Average
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