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https://doi.org/10.32657/10356...
Doctoral thesis . 2019 . Peer-reviewed
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Package and board level reliability modeling of advanced CSP pakages for telecommunication applications

Authors: Tee, Tong Yan;

Package and board level reliability modeling of advanced CSP pakages for telecommunication applications

Abstract

Market for telecommunication products (e.g., mobile phones) is very competitive, demanding products which are more reliable, higher performance, lighter, smaller, cheaper, and shorter time-to-market. These technology requirements are possible with the recent development of advanced Chip Scale Packages (CSPs), such as thin-profile fine-pitch Ball Grid Array (TFBGA), Quad-Flat-No-lead (QFN), and wafer-level CSP (WL-CSP). However, due to limited product development time, these CSPs are usually not tested and studied in detail before introduction to the market. As a result, the package design may not be optimized for various reliability requirements, e.g., popcorn, thermal cycling test, and drop test. DOCTOR OF PHILOSOPHY (MAE)

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Keywords

:Engineering::Manufacturing::Product engineering [DRNTU]

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
0
Average
Average
Average
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