
doi: 10.1587/elex.7.268
Two novel architectures for pipelined floating point fast Fourier transform on FPGA are presented. The new radix-22 two-path delay feedback (R22TDF) architecture leads to 50% area saving for floating point complex adders compared with the radix-22 single-path delay feedback (R22SDF) architecture. Besides a new hybrid architecture is presented which mixes the R22TDF and R22TDF butterfly structures and is flexible and efficient for FPGA implementation.
| selected citations These citations are derived from selected sources. This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically). | 0 | |
| popularity This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network. | Average | |
| influence This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically). | Average | |
| impulse This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network. | Average |
