Early reconfigurable computers were built with FPGAs loosely coupled to a host processor. The current generation of research processors uses a tighter coupling and integrates processor core and reconfigurable units on a system-on-chip. The design of such a hybrid reconfigurable processor entails a multitude of design parameters and asks for a methodical design approach. In this paper, we outline a method for the application-driven design of hybrid reconfigurable processors. Design decisions are based on quantitative data gathered from simulation of realistically-sized workloads on cycle-accurate processor models. These simulations allow performance estimation and comparison of different architectures, and facilitate codesign of the processor architecture and the compilation technology.