The future interconnection techniques should satisfy greater bandwidth, less latency, and higher energy efficiency for both out-of-chip and inside-chip scenarios; while the engineering constraints and cost-performance trade-off on channel characteristics, modulation/coding technique, and analog-digital transceiver scheme, must restrict the fulfilment of interconnection design target. In order to attain the destination mentioned above, co-optimization is employed toward channel, modulation/coding, and transceiver scheme. In this paper, the requirement for future interconnection, channel situation, and some implementation trends are presented.