
This paper introduces high-performance pipelined 256-point FFT processor based on Radix-22 for OFDM communication systems. This method uses Radix-2 butterfly structure and Radix-22 CFA algorithm. Radix-2 butterfly’s complexity is very low and Radix-22 CFA algorithm reduces number of twiddle factors compared to Radix-4 and Radix-2. The proposed design is implemented in VHDL language, synthesized using XST of Xilinx ISE 14.1, and simulated using ModelSim PE Student Edition 10.4a successfully. Also, MATLAB code has been written and simulated with MATLAB R2012a tool. The computation speed of proposed design is observed to be 129.214 MHz after the synthesis process and SQNR is 50.95 dB.
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