The Physical Downlink Shared Channel (PDSCH) is the supreme data-carriage downlink channel in Long Term Evolution (LTE). The PDSCH has Downlink Control Information (DCI) code words of varying length based on the LTE specifications such as DCI format and bandwidth. In this paper, different modules of Transceiver architecture for PDSCH are realized. The PDSCH transmit processing incorporates scrambling, modulation, layer mapping, precoding, data mapping to resource elements. This paper focus has been given to the spatial multiplexing part in layer mapping and precoding modules for high data rate. Also in the receiver end, implementation of Minimum Mean Square Error (MMSE) equalization and demodulation is carried out. To simulate all the modules of PDSCH channel, Modelsim is used. For synthesis and implementation, Xilinx PlanAhead 14.6 tool on Virtex-5 device board is used. From the implementation, it has been observed that the data rate is increased up to 159 Mbps by using four antennas.