A Soft Coprocessor Approach for Developing Image and Video Processing Applications on FPGAs
Copyright policy )A Soft Coprocessor Approach for Developing Image and Video Processing Applications on FPGAs
Developing Field Programmable Gate Array (FPGA)-based applications is typically a slow and multi-skilled task. Research in tools to support application development has gradually reached a higher level. This paper describes an approach which aims to further raise the level at which an application developer works in developing FPGA-based implementations of image and video processing applications. The starting concept is a system of streamed soft coprocessors. We present a set of soft coprocessors which implement some of the key abstractions of Image Algebra. Our soft coprocessors are designed for easy chaining, and allow users to describe their application as a dataflow graph. A prototype implementation of a development environment, called SCoPeS, is presented. An application can be modified even during execution without requiring re-synthesis. The paper concludes with performance and resource utilization results for different implementations of a sample algorithm. We conclude that the soft coprocessor approach has the potential to deliver better performance than the soft processor approach, and can improve programmability over dedicated HDL cores for domain-specific applications while achieving competitive real time performance and utilization.
- University of Sheffield United Kingdom
- Queen's University Belfast United Kingdom
- White Rose Consortium: University of Leeds; University of Sheffield; University of York United Kingdom
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soft coprocessor, image processing; FPGA; soft coprocessor; soft processor; image algebra, Computer applications to medicine. Medical informatics, R858-859.7, name=Signal Processing, /dk/atira/pure/sustainabledevelopmentgoals/industry_innovation_and_infrastructure; name=SDG 9 - Industry, Innovation, and Infrastructure, name=SDG 9 - Industry, Article, name=General Computer Science, /dk/atira/pure/sustainabledevelopmentgoals/sustainable_cities_and_communities, /dk/atira/pure/subjectarea/asjc/1700/1711; name=Signal Processing, Photography, name=General Engineering, /dk/atira/pure/subjectarea/asjc/2200/2200; name=General Engineering, /dk/atira/pure/sustainabledevelopmentgoals/industry_innovation_and_infrastructure, Innovation, TR1-1050, /dk/atira/pure/subjectarea/asjc/2200/2200, FPGA, /dk/atira/pure/subjectarea/asjc/1700/1711, /dk/atira/pure/subjectarea/asjc/1700/1707, image algebra, /dk/atira/pure/subjectarea/asjc/1700/1708, QA75.5-76.95, /dk/atira/pure/subjectarea/asjc/1700/1707; name=Computer Vision and Pattern Recognition, name=SDG 11 - Sustainable Cities and Communities, 004, 620, image processing, /dk/atira/pure/subjectarea/asjc/1700/1708; name=Hardware and Architecture, Electronic computers. Computer science, name=Hardware and Architecture, and Infrastructure, /dk/atira/pure/subjectarea/asjc/1700/1700; name=General Computer Science, soft processor, /dk/atira/pure/sustainabledevelopmentgoals/sustainable_cities_and_communities; name=SDG 11 - Sustainable Cities and Communities, /dk/atira/pure/subjectarea/asjc/1700/1700, name=Computer Vision and Pattern Recognition
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