Summary: This paper reports a novel approach for designing byte error-correcting codes using Cellular Automata (CA). A simple scheme for generation and decoding of Single-byte Error-Correcting and Double-byte Error-Detecting codes, referred to as CA-SbEC-DbED, is presented. Extension of the scheme to locate/correct larger number of information byte errors has been also included. The encoding and decoding algorithms have been designed with the help of a linear operator that can be conveniently realized with a maximum length group CA. The regular, modular and cascadable structure of CA can be economically built with VLSI technology. Compared to the existing architecture of the Reed-Solomon decoder chip, CA-based implementation of the proposed decoding scheme provides a simple cost effective solution.