Observation of signals at internal nodes is an important part of integrated circuit failure analysis. However, decreasing circuit dimensions and operating voltages and increasing complexity and clock speeds are making these observations more difficult. The electrostatic force microscope is an instrument that may have the simplicity, non-invasiveness and high spatial, temporal and electric potential resolution needed to probe internal nodes of the latest integrated circuits. This report describes how the software of an existing digital scanning probe microscope controller was modified for scanning electrostatic force microscopy. Several new features were added, including an algorithm to separate the electrostatic force signal from the circuit topography. The report also introduces a signal measurement technique that uses phase modulation to improve the temporal resolution of rectangular sampling pulses, at the cost of information about the measured signal's shape. This technique was used to measure transition times with 280 ps resolution, and propagation delays with 10 ps resolution on a microstrip transmission line using 1 ns sampling pulses. With the modified digital scanning probe microscope controller, it was used to characterize the gate delay of an integrated inverter, and image the electrostatic force over several integrated inverters at an instant in time.