
handle: 10447/619037
In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of acquiring the information coming from a fast digitization of the signals generated in a drift chambers. The digitized signals are analyzed using an ad hoc real‐time algorithm implemented in the FPGA in order to reduce the data throughput coming from the particle detector.
CluTim, Instrumention, drift chamber, impact parameter, FPGA, drift chamber, FPGA, DAQ, Instrumention, CluTim, impact parameter, DAQ
CluTim, Instrumention, drift chamber, impact parameter, FPGA, drift chamber, FPGA, DAQ, Instrumention, CluTim, impact parameter, DAQ
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