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doi: 10.1109/ats.2009.14
handle: 10261/87076
This paper presents a novel and low-cost methodology that can be used for testing RF blocks embedded in complex SoCs. It is based on the detection and spectral analysis of the two-tone response envelope of the block under test. The main non-linearity specifications of the block under test can be easily extracted from the envelope signal. The analytical basis of the proposed methodology is demonstrated, and a proposal for its implementation as a built-in test core is discussed. Finally, practical simulation examples show the feasibility of the approach.
This work has been funded in part by the Spanish Government through projects TEST (TEC2007-68072/ MIC) and SR2 (TSI-020400-2008-71/MEDEA+2A105), and by the Junta de Andalucía through project TEMITE (TIC-927).
Trabajo presentado al ATS celebrado en Taichung (Taiwan) del 23 al 26 de noviembre de 2009.
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