The use of Ring Oscillator PUFs to provide circuit authentication is analyzed in this paper. The limitations of the previously reported approach in terms of false rejection (due to high intra-die variations) and false acceptance (due to small inter-die variations) are discussed. These limitations are overcome by a new proposal that does not increase considerably hardware complexity and, besides, provides lower power consumption and/or higher speed to achieve high security requirements. All these issues are illustrated with experimental results obtained with FPGAs from Xilinx