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handle: 11441/56394 , 10261/84143
Esta comunicación presenta un algoritmo de dos pasadas para el etiquetado en tiempo real de los componentes conexos en una imagen. El algoritmo propuesto es una buena opción frente a otras alternativas de dos y múltiples pasadas ya que ha sido diseñado considerando que su implementación en FPGAs ofrezca un buen compromiso entre recursos ocupados y velocidad de operación. Se describen dos implementaciones hardware de este algoritmo, cuyo desarrollo se ha llevado a cabo siguiendo un flujo de diseño basado en la herramienta System Generator de Xilinx.
Ministerio de Ciencia e Innovación (España) TEC2008-04920
Comunidad Económica Europea MOBY-DIC FP7-IST- 248858
Junta de Andalucía P08- TIC-03674
Fondos Feder P08- TIC-03674
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