At first glance, Random Telegraph Noise (RTN) in deeply scaled CMOS transistors may seem like a reliability nuisance. Yet, behind the discrete trapping-and-detrapping events lurks a potent source of hardware entropy. In this paper, we harness RTN to build a dual-purpose security module that serves as both a Physical Unclonable Function (PUF) and a True Random Number Generator (TRNG). By measuring the so-called Maximum Current Fluctuation (MCF) at carefully chosen observation windows, our design switches effortlessly between the stable outputs needed for a PUF and the maximally unpredictable bitstreams demanded by a TRNG. Although single-defect RTN has long been deemed ideal for randomness, we show that multi-defect RTN scenarios, much more prevalent in real-world manufacturing, can also yield high-quality random bits, especially when aided by lightweight post-processing. Simple statistical metrics guide the initial tuning, after which the final bitstreams pass the NIST SP 800-22 test suite to validate the statistical soundness of our proposal. In doing so, we address key challenges that arise when designing an RTN-based TRNG and compare our results against state-of-the-art solutions, highlighting advantages in circuit simplicity, bit-rate scalability, and dual-use capability.

This work was supported by grant TED2021-131240B-I00 funded by MICIU/AEI/10.13039/501100011033 and by the “European Union NextGenerationEU/PRTR”. The work was also supported by grant PID2022-136949OB-C21 funded by MICIU/AEI/10.13039/5011000 11033 and by “ERDF/EU”, by grant ProyExcel_00536 funded by Consejería de Universidad, Investigación e Innovación of Junta de Andalucía, and by Ministerio de Asuntos Económicos y Transformación Digital through grant TSI-069100-2023-1 of PERTE Chip Chair program, funded by European Union - NextGenerationUE. F. J. Rubio-Barbero was supported by grant PREP2022-000765 funded by MICIU/AEI/ 10.13039/501100011033 and by “FSE+”. A preliminary version of this work is published in the 2024 edition of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD) [24].

Peer reviewed