
handle: 10261/383619
Physical Unclonable Functions (PUFs) have emerged as a promising solution for generating cryptographic keys required in low-cost resource-constrained devices. Unfortunately, PUF reliability can be affected by environmental variations and aging since the secret key is stored in the form of an analog quantity within the hardware. Several approaches, including bit selection techniques and error-correcting codes, have been proposed to obtain a reliable PUF operation. In this work, an optimization-based bit selection is proposed to improve the reliability of any PUF where each challenge consists in comparing a certain random effect in two or more devices from an array. The proposed technique is tested with a PUF that compares the Random Telegraph Noise, as underlying entropy source, in a pair of transistors from an array. The results show that if these two transistors are selected using the optimization-based bit selection, the reliability of the PUF can be significantly improved when compared to a PUF with random bit selection. Such an improvement leads to a much better utilization of the silicon area since many more transistors can be efficiently selected to obtain reliable PUF response bits.
This work was supported by grant TED2021-131240B-I00 funded by MICIU/AEI/10.13039/501100011033 and by the “European Union NextGenerationEU/PRTR”. The work was also supported by grant PID2022-136949OB-C21 funded by MICIU/AEI/10.13039/501100011033 and by “ERDF/EU”; and by grant ProyExcel 00536 funded by Consejerıa de Universidad, Investigacion e Innovacion of Junta de Andalucıa. F. J. Rubio-Barbero was supported by grant PREP2022-000765 funded by MICIU/AEI/10.13039/501100011033 and by “FSE+”.
Copyright IEEE
Peer reviewed
CMOS, RTN, Hardware Security, Bit Selection, PUF
CMOS, RTN, Hardware Security, Bit Selection, PUF
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