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handle: 10261/33892
[ES] El objeto de la presente invención es un procedimiento digital de bajo coste para la estimación de la No-Linealidad-Integral (Integral-Non-Linearity, INL, según sus siglas en inglés) en Convertidores Analógico-Digitales (Analog to Digital Converters, ADC, según sus siglas en inglés). Dicho procedimiento es válido para el test y caracterización de cualquier topología de conversión analógico-digital en aplicaciones BIST (de sus siglas en inglés, Built-In Self-Test) concurrentes como no concurrentes.
[EN] The invention relates to a low-cost digital method for estimating the integral non-linearity (INL) in analog-todigital converters. Said method is valid for the testing and characterisation of any analog-to-digital conversion topology in both concurrent and non-concurrent built-in self-test BIST applications.
Consejo Superior de Investigaciones Científicas (España), Universidad de Sevilla
A1 Solicitud de patente con informe sobre el estado de la técnica
Peer reviewed
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