This technical note explores the implementation and performance evaluation of Selective Harmonic Elimination (SHE) using a Programmed Patterns PWM (PP-PWM) modulator. Designed primarily for high-power applications operating at low switching frequencies, SHE lowers current harmonic distortion to relax physical filtering constraints. The note outlines how switching angles are pre-computed offline assuming quarter-wave symmetry, arranged into look-up tables (LUTs), and mapped dynamically at run-time. To validate the strategy, a case study featuring a three-level Neutral Point Clamped (NPC) inverter driving an induction machine is evaluated via Hardware-in-the-Loop (HIL) simulation..