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A High Performance Dual Mode Synchronous/Asynchronous Parallel Bus Controller Utilizing the PI Bus Standard Protocol

Authors: Michael S. Foster;

A High Performance Dual Mode Synchronous/Asynchronous Parallel Bus Controller Utilizing the PI Bus Standard Protocol

Abstract

<div class="htmlview paragraph">Boeing's Self-Timed Parallel Interface (SPI) Controller implements the synchronous PI bus backplane as well as an asynchronous self-timed backplane. The asynchronous mode implements the PI bus protocol while utilizing a self-timed transfer scheme. This scheme eliminates the complex clocking scheme of the synchronous backplane, supports decentralized systems, is technology independent, and supports very high data transfer rates. The technology independence of the SPI bus controller means that the transfer rate on the backplane is as fast as the technology will allow for the active modules on the backplane.</div>

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
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