This paper considers and presents the design of a rail-to-rail input and output CMOS (complementary metal oxide semiconductor) two-stage operational amplifier (op-amp). The design uses two capacitance based compensation techniques for controlling stability and frequency response, the conventional Miller and negative Miller capacitances. The negative Miller capacitance is constructed around the first amplification stage and the conventional Miller capacitance is constructed around the second amplification stage. By setting suitable capacitance values, the conventional Miller and negative Miller capacitances allow the designer to control stability margins and frequency response. The design is based on a low-power design where the first stage consists of complementary differential input and summing circuit, and the second stage is a class-AB amplifier. The design has been created using a 0.35 μm CMOS (n-well) technology, its operation strategy simulated using the Cadence Spectre simulator and operates on a +3.3 V power supply.

peer-reviewed