
This manuscript presents a fully differential difference transconductance amplifier (FDDTA) architecture based on CMOS inverters. Designed in a 130-nm CMOS process it operates in weak inversion when supplied with 0.25 V. In addition, the FDDTA requires no supplementary external calibration circuit, like tail current or bias voltage sources, since it relies on the distributed layout technique that intrinsically matches the CMOS inverters. For analytical purposes, we carried out a detailed investigation that describes all the concepts and the whole operation of the FDDTA architecture. Furthermore, a comparison between the modeling equations and measured data assures high performance.
CMOS inverters, fully differential difference transconductance amplifier, differential buffer configuration, weak inversion region, low-power circuits
CMOS inverters, fully differential difference transconductance amplifier, differential buffer configuration, weak inversion region, low-power circuits
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