
arXiv: 2303.13601
Quantization using a small number of bits shows promise for reducing latency and memory usage in deep neural networks. However, most quantization methods cannot readily handle complicated functions such as exponential and square root, and prior approaches involve complex training processes that must interact with floating-point values. This paper proposes a robust method for the full integer quantization of vision transformer networks without requiring any intermediate floating-point computations. The quantization techniques can be applied in various hardware or software implementations, including processor/memory architectures and FPGAs.
9 pages, 0 figure
FOS: Computer and information sciences, B.2.2, Computer Vision and Pattern Recognition (cs.CV), B.2.4, Image and Video Processing (eess.IV), Computer Science - Computer Vision and Pattern Recognition, Electrical Engineering and Systems Science - Image and Video Processing, I.4.9; B.2.4; B.2.2, Hardware Architecture (cs.AR), FOS: Electrical engineering, electronic engineering, information engineering, I.4.9, Computer Science - Hardware Architecture
FOS: Computer and information sciences, B.2.2, Computer Vision and Pattern Recognition (cs.CV), B.2.4, Image and Video Processing (eess.IV), Computer Science - Computer Vision and Pattern Recognition, Electrical Engineering and Systems Science - Image and Video Processing, I.4.9; B.2.4; B.2.2, Hardware Architecture (cs.AR), FOS: Electrical engineering, electronic engineering, information engineering, I.4.9, Computer Science - Hardware Architecture
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