ABSTRACTThree-dimensional integration offers a dramatic reduction in chip area required per bit and has long been a research objective. Three-dimensional integration with thin film transistors (TFTs) requires detailed parametric analysis with techniques such as Capacitance-Voltage (CV) Characterization. CV analysis of polysilicon TFTs uses polysilicon-oxide-polysilicon thin film structures. Most of the CV analysis involving polysilicon available to date, however, is with polysilicon-oxide-bulk silicon structures. In this paper, we report the results of modeling andmeasurement of the CV characteristics of polysilicon-polysilicon oxide-polysilicon for doped and undoped polysilicon. To increase the conductivity of the polysilicon, elevated temperatures were used for measurement. CV measurements matching the theoretical curves were made for these polysilicon thin films. Oxide thickness, series and shunt resistance were extracted and correlated to process problems and splits.