Microprocessors are designed with a fixed set of microarchitectural resources. However, resource requirements vary across programs and within a program as it passes through different phases of execution. This mismatch between the microarchitecture and program requirements leads to sub-optimal power/performance. We present an adaptive microarchitecture that dynamically adapts to changing program requirements in order to achieve power efficiency with minimal performance loss. The microarchitecture employs four multi-configuration units which are controlled by a phase-based tuning algorithm. We show, via simulation, that the best performing tuning algorithm achieves significant reduction in leakage power with performance loss of ~1%.