Vertical 3D NAND Flash Memory Technology

descriptionPublicationkeyboard_double_arrow_right Article , Other literature type 01 Aug 2011Publisher:The Electrochemical SocietyJournal:ECS Transactions, volume 41, pages 15-25 (issn: 1938-5862, eissn: 1938-6737,

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Authors: Akihiro Nitayama; Hideaki Aochi;

doi: 10.1149/1.3633282 , 10.1149/ma2011-02/32/2125

Vertical 3D NAND Flash Memory Technology

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Abstract

We've developed Bit Cost Scalable (BiCS) flash technology as a three-dimensional memory for the future ultra high density storage devices, which extremely reduces the chip costs by vertically stacking memory arrays with punch and plug process. We've advanced it into Pipe-shaped BiCS flash memory introducing U-shaped NAND string structure, to improve operation window, speed and reliability. 32 G bit test chips with 16 stacked layers by 60nm P-BiCS flash process have been fabricated, and the functionality of Multi-Level-Cell (MLC) operation has been successfully demonstrated. P-BiCS is the most promising candidate of three-dimensional ultra high density data storage memories.

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Toshiba (Japan)
Japan

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