This paper presents a recursive approach for parametric delay calculations for a beamformer. The suggested calculation procedure is capable of calculating the delays for any image line defined by an origin and arbitrary direction. It involves only add and shift operations making it suitable for hardware implementation. One delaycalculation unit (DCU) needs 4 parameters, and all operations can be implemented using fixed-point arithmetics. An N -channel system needs N + 1 DCUs per line - one for the distance from the transmit origin to the image point and N for the distances from the image point to each of the receivers. Each DCU recursively calculates the square of the distance between a transducer element and a point on the beamformed line. Then it finds the approximate square root. The distance to point i is used as an initial guess for point i + 1. Using fixed-point calculations with 36-bit precision gives an error in the delay calculations on the order of 1/64 samples, at a sampling frequency of f s = 40 MHz. The circuit has been synthesized for a Virtex II Pro device speed grade 6 in two versions - a pipelined and a non-pipelined producing 150 and 30 million delays per second, respectively. The non-pipelined circuit occupies about 0.5 % of the FPGA resources and the pipelined one about 1 %. When the square root is found with a pipelined CORDIC processor, 2 % of the FPGA slices are used to deliver 150 million delays per second.