The trend in the microelectronics industry, and in particular that part of the industry concerned with the fabrication of integrated circuits, is toward circuits with increasingly high density and devices with smaller feature size. This trend has spurred interest in several new process technologies for pattern replication. One such emerging technology is ion-beam etching that offers higher resolution, greater dimensional control, and higher yield than conventional wet chemical etching. Several examples of surface relief formation by ion-beam etching illustrate the advantage of this approach. The particular limitations imposed by ion-beam etching, namely mask erosion and faceting, redeposition, and trenching, are treated. Developments of simple models for predicting etch rates on sloped surfaces and sidewall profiles are described. Such models are critical for the successful application of ion-beam etching to patterning high-density integrated circuits.