Iterative Viterbi Algorithm: Implementation Issues
Copyright policy )Iterative Viterbi Algorithm: Implementation Issues
We address several issues for implementing the iterative Viterbi decoder. We show that 3-bit branch metric quantization, 7- or 8-bit state metric precision, and a survivor length of five times the constraint length yields little degradation for the iterative Viterbi algorithm (IVA). Our results show that without changing the VA hardware (except adding some additional circuits), the error performance of several standard systems can be significantly improved.
- University of Central Florida United States
Serial concatenated codes, CONVOLUTIONAL-CODES, coding for wireless systems, Coding for wireless systems, TURBO-CODES, POWER, codes, COMMUNICATION, PERFORMANCE, Iterative decoding, iterative decoding, serial concatenated, turbo decoding, Engineering, DECODER, Telecommunications, Turbo decoding, Electrical & Electronic, Viterbi decoding
Serial concatenated codes, CONVOLUTIONAL-CODES, coding for wireless systems, Coding for wireless systems, TURBO-CODES, POWER, codes, COMMUNICATION, PERFORMANCE, Iterative decoding, iterative decoding, serial concatenated, turbo decoding, Engineering, DECODER, Telecommunications, Turbo decoding, Electrical & Electronic, Viterbi decoding
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