This paper gives an explanation that SET pulse-width modulation in bulk CMOS devices happens due to negative bias temperature instability (NBTI). To investigate this, we propose and implement a stress adjustable pulse-width measurement circuit. Measurement results of test chips fabricated in a 65nm bulk CMOS process clearly show that pulse-width broadening and shrinking depend on the condition of static and dynamic stress before the pulse propagation. The measured dependency of pulse-width modulation on supply voltage is well correlated with that of NBTI model. We also point out that soft error rate computed from SET pulse-width distribution measured under static stress is pessimistic.