The academia largely relies on two classes of circuits to benchmark its developments in the field of DFT. The first class are academic benchmarks such as ISCAS-85 [1], ISCAS-89 [2] and ITC-99 [3] circuits. They are reasonably old and thus significantly smaller than today's realistic designs. Furthermore, their characteristics may not match the properties of recent designs. This might facilitate developments which are not useful for current circuits. For instance, ISCAS-85 circuits tend to have many reconvergen- cies and thus a huge number of paths through combinational logic. This triggered adding functionality handling recon- vergencies efficiently to academic test generation tools. This functionality may not be highly relevant in today's practice