In this paper, we propose an architecture for context-based adaptive variable length coding using programmable logic array. This design is focused in optimizing the hardware cost and enhancing the speed of encoding. The proposed architecture has been simulated using ModelSim, and implemented by UMC 0.18 mum cell library. Simulation results illustrates that, the proposed design satisfies the real time constrains, required by various video applications with 2475 logic gates at 210 MHz