Side channel attacks are a significant threat to the deployment of secure embedded systems. Differential power analysis is one of the powerful power analysis attacks, which can be exploited in secure devices such as smart cards, PDAs and mobile phones. Several researchers in the past have presented experiments and countermeasures for differential power analysis in AES cryptography, though none of them have described the attack in a step by step manner, covering all the aspects of the attack. Some of the important missing segments are the consideration of pipelines, analysis of the power profile to locate the points of attack, the correspondence of the source code, its assembly representation, and the point of attack. In this paper we describe in detail a step-wise explanation of the differential power analysis of an AES implementation, with all of the aspects identified above.