RAKE based receivers are the most challenging receiver due to its hardware implementation complexity. To build a cross-correlating RAKE receiver with on-off keying pose significant design challenges due to multipath components. Also process variations in 90 nm CMOS technology impose significant challenges in the clockless system. In this paper, a simple coherent RAKE receiver using single-bit correlation in continuous time is reported. A working chip with fully integrated digital symbol detection without any clocks, ADC and filters for simple and power efficient CMOS implementation. Optimal design of the delay elements in the tapped delayline and the use of pulse width controller blocks (PWC) along the delayline allows narrow pulses through the system. The optimized delayline combined with the continuous-time high speed counter and the match thresholder constitute a complete continuous-time RAKE receiver in CMOS. Initial chip measurement shows that a data rate of 1.5 Mbit/s with a power consumption of 0.78 mW was possible.