In the fast paced world of IC design, companies strive for ways to create competitive, robust designs, while delivering speedy time-to-market results. A top-down design flow provides a fast, results oriented design methodology, but, at most Universities, the strong legacy of the Mead/Conway approach has lead to custom methods being the default way to teach students VLSI design. This paper discusses some experiences with teaching a top-down System-on-a- Chip (SoC) design class.