Transactional Memory: An Overview

descriptionPublicationkeyboard_double_arrow_right Article 01 May 2007 Spain Publisher:Institute of Electrical and Electronics Engineers (IEEE)Journal:IEEE Micro, volume 27, pages 8-29 (issn: 0272-1732,

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Authors: Tim Harris 0001; Adrián Cristal; Osman S. Unsal; Eduard Ayguadé; Fabrizio Gagliardi; Burton Smith; Mateo Valero;

doi: 10.1109/mm.2007.63

handle: 2117/28410

Transactional Memory: An Overview

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Abstract

Writing applications that benefit from the massive computational power of future multicore chip multiprocessors will not be an easy task for mainstream programmers accustomed to sequential algorithms rather than parallel ones. This article presents a survey of transactional memory, a mechanism that promises to enable scalable performance while freeing programmers from some of the burden of modifying their parallel code. Peer Reviewed

Country

Spain

Related Organizations

Barcelona Supercomputing Center
Spain
Universitat Polite`cnica de Catalunya
Spain
Universitat Politècnica de Catalunya
Spain
Microsoft (United States)
United States

Keywords

Parallel programming, Parallel programming (Computer science), Storage management, Gestió de memòria (Informàtica), Programació en paral·lel (Informàtica), Àrees temàtiques de la UPC::Informàtica::Sistemes d'informació::Emmagatzematge i recuperació de la informació, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles, Memory management (Computer science), Distributed shared memory systems, :Informàtica::Sistemes d'informació::Emmagatzematge i recuperació de la informació [Àrees temàtiques de la UPC], :Informàtica::Arquitectura de computadors::Arquitectures paral·leles [Àrees temàtiques de la UPC]

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