This is the first of two roundtables on electronic system-level design in this issue of IEEE Design & Test. ESL design and tools have been present in the design landscape for many years. Significant ESL innovations are now part of most advanced design methodologies, spanning the domains of modeling, simulation, and synthesis. Techniques such as transaction-level modeling, automatic interconnection generation, behavioral synthesis, automatic instruction-set customization, retargetable compilers, and many others are currently used in the design of multimillion-gate chips. Yet, ESL design still seems to struggle to live up to the promise of providing increased productivity and design quality. This roundtable examines these issues and attempts to provide a definite picture of where ESL design is today and where it might be in the next five to 10 years. The participants in this roundtable include well-known experts in ESL design from the user side, universities, and tool providers. IEEE Design & Test thanks the roundtable participants: moderator Reinaldo Bergamaschi (CadComponents), Luca Benini (University of Bologna), Krisztian Flautner (ARM UK), Wido Kruijtzer (NXP Semiconductors), Alberto Sangiovanni-Vincentelli (University of California, Berkeley), and Kazutoshi Wakabayashi (NEC Japan). D&T gratefully acknowledges the help of Roundtables Editor Bill Joyner (Semiconductor Research Corp.), who organized the event.