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image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao IEEE Circuits and De...arrow_drop_down
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
IEEE Circuits and Devices Magazine
Article . 1995 . Peer-reviewed
License: IEEE Copyright
Data sources: Crossref
image/svg+xml Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao Closed Access logo, derived from PLoS Open Access logo. This version with transparent background. http://commons.wikimedia.org/wiki/File:Closed_Access_logo_transparent.svg Jakob Voss, based on art designer at PLoS, modified by Wikipedia users Nina and Beao
IEEE Circuits and Devices Magazine
Article . 2005 . Peer-reviewed
License: IEEE Copyright
Data sources: Crossref
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VSLI Designer's Interface

Authors: D.W. Bouldin;

VSLI Designer's Interface

Abstract

This presentation discusses the availability of a standard-cell library targeting the TSMC-0.25 /spl mu/m, 2.5 V CMOS process; IBM's development of a new "Double-Gate" transistor fabricated in an SOI process and Intel's "TetraHertz Transistor," which it claims is the world's smallest transistor with a gate length of only 15 nm; Modu-Lab, a Web site dedicated to illustrating microfabrication techniques for the basic process steps of deposit, pattern, etch, and repeat; OpenCores' free open-source 33/66 MHz 32-bit PCI Bridge Soft Core, a complete synthesizable RTL (Verilog) code that provides bridging between the PCI and a WISHBONE (system-on-chip) bus; Foveon's development of a full-color image sensor chip that uses three layers of photodetectors embedded in silicon; Aldec and Synplicity design entry and simulation tools for universities and students; a new set of system-on-chip test benchmark circuits; and takes a look at nanotechnology initiatives.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
0
Average
Average
Average
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