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IEEE Electron Device Letters
Article . 2011 . Peer-reviewed
License: IEEE Copyright
Data sources: Crossref
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Novel Readout Circuit Architecture for CMOS Image Sensors Minimizing RTS Noise

Authors: Martin-Gonthier, Philippe; Magnan, Pierre;

Novel Readout Circuit Architecture for CMOS Image Sensors Minimizing RTS Noise

Abstract

This letter presents a novel readout architecture and its associated readout sequence for complementary metal-oxide-semiconductor (CMOS) image sensors (CISs) based on switch biasing techniques in order to reduce noisy pixel numbers induced by in-pixel source-follower transistor random telegraph signal noise. Measurement results done on a test image sensor designed with 0.35-μm CIS technology demonstrate an efficient reduction of noisy pixel numbers without a pixel performance decrease.

Country
France
Keywords

Noisy pixel reduction, Traitement du signal et de l'image, Random telegraph signal (RTS) noise, CMOS image sensor (CIS)- Correlated double sampling (CDS), Low frequency noise (LFN)

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
views
OpenAIRE UsageCountsViews provided by UsageCounts
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19
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