For the first time, an experimental assessment of the intradie mismatch properties of a FinFET technology is presented. By applying the analysis to different combinations of gate stack materials, it is shown that the best results are obtained with undoped fins, with matching performances on par or even superior to those of planar MOSFETs. Furthermore, the observation in the narrowest transistors of a noticeable degradation of the mismatch in both the threshold voltage and current factor points to line-edge roughness effects as the presumed key factor influencing intradie mismatch in the smallest fin geometries