This paper describes the theory, design, implementation, simulation, and testing of an ASIC capable of generating false target radar images for countering wideband synthetic aperture and inverse synthetic aperture imaging radars. The 5.5 /spl times/ 6.1 mm IC has 81632 transistors, 132 I/O pins, and consumes 0.132 W at 70 MHz from a 3.3-V supply. An introduction to the application and operation of the ASIC in an electronic attack system is also presented. The false target image is fully programmable and the chip is capable of generating images of both small and large targets, even up to the size of an aircraft carrier. This is the first reported use of all-digital technology to generate false target radar images of large targets.