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Structured Construction of VLSI Circuits Using Adjacency Lists

Authors: M. V. V. Satyanarayana;

Structured Construction of VLSI Circuits Using Adjacency Lists

Abstract

There are many algorithms to generate incremental VLSI compaction spacing constraints. This paper will utilize adjacency list representation to structurally construct the VLSI circuits. Algorithms for creation, insertion, deletion and movement of a tile in a double-linked list are given in a pseudo-language. The adjacency list representation is highly faster in compaction compared to the previous algorithms. There are many problems when we use a compactor to generate the design rule constraints. One problem is the long run times needed for large designs. If the resulting layout is too big, some of the cells have to be changed and the whole circuit recompacted. This design loop time could be drastically reduced by an incremental compactor. If we use an incremental compactor to incrementally generate design rules constraints, we will find two types of design rule constraints. The first class holds things together, keeping the parts of transistors and constraints aligned and wires connected to their end points. The second class are known as spacing rules. They provide the margins needed by the fabrication process to keep adjacent objects in the layout from interfering each other. 2. Adjacency lists This section describes the adjacency lists datastructure. Each tile has a list of the tiles adjacent to its left edge and another list for its right edge. Two tiles are adjacent if and only if a spacing constraint is needed to keep them apart- The relationship is symmetric; if A is left adjacent to B (in Bs left list) then B is right adjacent to A. The adjacency information is stored using threaded lists, each tile record has left, right, up, and down pointers. The lists are threaded clockwise, the left (right) pointer points to the lowest left (highest right) adjacent tile and the up (down pointers) are followed for the rest of the left (right) adjacency list. The lists are not always nil ended, it is possible for a tile to be the last tile in one tile's adjacency list and the first tile in another's. But the down (up) pointer of a record is always part of the right (left) adjacency list of the tile pointed to by that record's left (right) pointer.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
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Average
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