A multi-objective optimization algorithm, based on the Ant Colony Optimization technique (MOACO), to deal with the transistor sizing of CMOS Current Conveyors is presented. The main objectives are a minimal parasitic X-port resistance Rx and a maximal current high cut off frequency fci. A pareto front is then generated and the optimal solutions were adopted. SPICE simulation are used to validate the obtained sizing/performances, and comparison with published works are highlighted.