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Cairo University SPARC V2 (CUSPARC V2) processor

Authors: S. E.-D. Habib; Mohamed Wagih I. Ismail; Ahmed Ibrahim S. Khalil; Ezz El-Din O. Hussein; Alhassan F. Khedr; Safaa A. Abdelfattah; Ahmed Reda; +1 Authors

Cairo University SPARC V2 (CUSPARC V2) processor

Abstract

The Cairo University SPARC (CUSPARC) processor is an IP embedded processor based on SPARC V8 ISA standard. It is fully developed at Cairo University and is the first Egyptian processor. CUSPARC was implemented on several FPGA and ASIC platforms. Its first ASIC version (CUSPARC V1) was implemented on Si in 2010 using IBM 0.13μm CMOS 8RF-DM process. This paper reports the design, fabrication and testing of an enhanced version of CUSPARC, labelled CUSPARC V2. CUSPARC V2 is augmented with an ADPLL, a hardware multiplier, and four JTAG scan chains.

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
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