Today, security is a topic which attacks the greatinterest of researchers. Many encryption algorithms have beeninvestigated, and developed in the last years. Hash functionsare important security primitives used for authentication anddata integrity. The reconfigurable cryptographic chip is anintegrated circuit that is designed by means of the method ofreconfigurable architecture, and is used for encryption anddecryption. It can implement many different cipher algorithmsflexibly and quickly, and be used in many fields. This work isrelated to hash functions FPGA implementation. Five differenthash functions SHA-1, SHA-224, SHA-256, SHA-384 andSHA-512 are studied. A reconfigurable architecture isproposed for the implementation of all of them in the samehardware module. Finally, it gives the implementation resultsbased on the FPGA of the family of Stratix II of AlteraCorporation. The proposed system reaches throughput valuesequal to 727.853Mbps for SHA-1, 909.816Mbps for SHA-224/256, and 1.456Gbps for SHA-384/512 respectively.