A 100 dB dynamic range global shutter CMOS image sensor implementing an innovative fixed pattern noise (FPN) reduction method is presented. This image sensor uses global shutter pixel architecture in order to avoid distortion in imaging fast moving objects. To limit shutter leakage, a new PMOS pixel architecture is implemented. The high dynamic range is reach through a logarithmic architecture pixel. An on-chip calibration method is implemented to reduce the FPN caused by process variations, weakness of this architecture. The basic principle is the calibration of each pixel against an in-pixel reference current in place of the normal diode photocurrent. Two pixel levels corresponding to the photocurrent and a known reference current become available for every pixel. Then a double sampling technique allows to remove offsets due to threshold voltage variations. An innovation of this work consists in the implementation of the current calibration source inside the pixel. A 32times240 pixels test chip has been designed and fabricated in 0.18 mum, 3.3 V CMOS standard technology. Pixel measures 10times10 mum2 with a fill factor of 20%. The dynamic range is about 100 dB with a frame rate up to 33 images per second and a 1.8% RMS FPN.