An electrical or an electronic circuit often contains special combinations of circuit symbols in the form of sub-circuits. Identification and analysis of these sub-circuits can substantially simplify the underlying topology of a circuit. This paper explains our maiden attempt towards topological simplification of a circuit by identifying two important classes of sub-circuits—one formed by symbols connected in series and another by symbols connected in parallel. Although a sub-circuit is usually formed with the same type of circuit symbols, our method can handle any combination, irrespective of the symbol types. The method, in general, is based on a novel histogram analysis, mathematical morphology, and geometric features during the symbol identification phase, and a set of adjacency lists representing the connectivity matrix during the analysis phase. The idea may be extended to match topologically similar but spatially different circuits using graph isomorphism. It may also be used for vectorization of circuit drawings utilizing the information on the segmented circuit elements and their connectivity matrices. We have tested the proposed method on a dataset containing 83 scanned images of a variety of electronic and electrical drawings. Some of the results are presented here to demonstrate its efficacy and robustness.