A Compact Transactional Memory Multiprocessor System on FPGA

descriptionPublicationkeyboard_double_arrow_right Article , Conference object 01 Aug 2010 Italy Publisher:IEEEJournal:2010 International Conference on Field Programmable Logic and Applications

Authors: Matteo Pusceddu; Simone Ceccolini; Gianluca Palermo; Donatella Sciuto; Antonino Tumeo;

doi: 10.1109/fpl.2010.113

handle: 11311/576711

A Compact Transactional Memory Multiprocessor System on FPGA

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Abstract

In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only by off-the-shelf cores and is useful for porting and early validation of programs to the transactional memory programming model. We discuss the implementation of the software layer of this platform, propose an analysis of the system and compare it to a hardware lock based multiprocessor architecture, showing the trade-offs in terms of performance and programming complexity.

Country

Italy

Related Organizations

Pacific Northwest National Laboratory
United States
Polytechnic University of Milan
Italy

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