Summary form only given. Dr. Gordon E. Moore's Law - integration's capacity doubles every two years - is under server pressure. Leakage power is the major factor in the challenge to keep Moore's Law alive and well. As process technologies continue to shrink, and feature demands continue to increase, more and more capabilities are being pushed into smaller and smaller packages. But are we finally reaching the point where power density limitations make this trend no longer sustainable? The test environment has long been known to be more severe power wise than the functional environment. To that end, a number of new approaches need to be taken in the test area to control not only scan in power but also the capture power. What advanced techniques are in use today, and on the horizon, to address this? Are we limited only to hardware techniques, or can these power limitation issues be addressed with smarter software, such as automatic test pattern generation tools? And how do we handle verification of these complex implementations? How do these new demands affect our ability to compress test time and test data volume? This paper explores possible methods for improving the "power capacity" of power-sensitive design from both the functional and test perspectives.