A deterministic, directed, parallel electrostatic assembly and transfer process is being developed to arrange chips for electronics applications. Singulated chips 10 um - 200 um in size and initially in solution, are sorted, transported and oriented to form programmed patterns. The arrangements are then transferred to a final substrate with contact stamping or an electrostatic roller belt. Demonstrations achieved include automated parallel assembly, micrometer scale registration, heterogeneous integration, inch scale outputs, and basic functional circuits. The eventual goal is the ability to integrate millions of chiplets into systems with fine control over large areas to enable next generation electronic systems.